This is my first posting, I have been following Mike Holt's forum and there is a wealth of information here. Anyway, please go easy on me!
So anyway, I am currently working on a design which has multiple outputs that are for supplying power from a C1D2 area to devices in a C1D1 area. The supply is 16VDC and barriered using appropriately rated zeners and current limiting resistors to 16.8V max and 93mA. This supply is distributed to a number of outputs, so from IEC60079-11, Ca for 16.8V is listed as 2.29uF.
So the problem that I am wrestling with is that the power supply circuitry requires at least 1.8uF, and that leaves very little for cable and end-device capacitance for even one output. If the installation requires more sensors, that budget is eaten away quite quickly.
I have looked at the reduction of effective capacitance by series resistance (A.4), but I am not sure that applies in this case. The other thing is can the entity parameters be isolated so that the full 2.29uF (+/- component tolerances) limit could be used for each output? One thing I felt that looked promising was the use of three blocking diodes in series before each output to isolate the capacitance on each cable+end device. Optionally the barrier could be replicated for each port, but I was wondering if there is an alternative way of doing this.
What I am working with is essentially this:
Vmax = 16.8V
Imax = 93 mA
Ca = 2.29uF - (1.8uF+20%) = 0.13uF
La = 16.4mH
[Power Supply (with 1.8uF+20%) --> CLR of 183.2 ohms --> 16V Shunt Diodes] -- > Outputs
--> Output #1 (Ca = 0.13uF / 6)
Any thoughts would be appreciated.
So anyway, I am currently working on a design which has multiple outputs that are for supplying power from a C1D2 area to devices in a C1D1 area. The supply is 16VDC and barriered using appropriately rated zeners and current limiting resistors to 16.8V max and 93mA. This supply is distributed to a number of outputs, so from IEC60079-11, Ca for 16.8V is listed as 2.29uF.
So the problem that I am wrestling with is that the power supply circuitry requires at least 1.8uF, and that leaves very little for cable and end-device capacitance for even one output. If the installation requires more sensors, that budget is eaten away quite quickly.
I have looked at the reduction of effective capacitance by series resistance (A.4), but I am not sure that applies in this case. The other thing is can the entity parameters be isolated so that the full 2.29uF (+/- component tolerances) limit could be used for each output? One thing I felt that looked promising was the use of three blocking diodes in series before each output to isolate the capacitance on each cable+end device. Optionally the barrier could be replicated for each port, but I was wondering if there is an alternative way of doing this.
What I am working with is essentially this:
Vmax = 16.8V
Imax = 93 mA
Ca = 2.29uF - (1.8uF+20%) = 0.13uF
La = 16.4mH
[Power Supply (with 1.8uF+20%) --> CLR of 183.2 ohms --> 16V Shunt Diodes] -- > Outputs
--> Output #1 (Ca = 0.13uF / 6)
--> Output #2 (Ca = 0.13uF / 6)
--> Output #3 (Ca = 0.13uF / 6)
--> Output #4 (Ca = 0.13uF / 6)
--> Output #5 (Ca = 0.13uF / 6)
--> Output #6 (Ca = 0.13uF / 6)
Any thoughts would be appreciated.