arcing fault vs. protective device arcing fault

[lielec11]

I am working on a power system study for a client. It is all 120/208V, 3-phase normal distribution with three gensets paralleled together on the emergency side. I ran two scenarios, one for normal power and one for emergency operation. Client came back requesting I do a closed transition scenario because the ATS have the ability to do that.

Question I have came up during the arc flash analysis. Under the closed transition scenario a few buses jumped up in arcing fault. This makes sense to me as we now have contributions from both the normal and emergency side of the ATS. However, the "protective device arcing fault" dropped lower. Low enough to a point where the equipment should not be worked on live based on the incident energy levels.

I can't seem to understand why the protective device arcing fault is lower for the closed transition scenario than in both the normal and emergency scenario. The protective device that will clear the fault is on the normal side and is located in an upstream DP but in both the normal and emergency cases the bus arcing fault always was equal to the "protective device arcing fault". I did a search and can't seem to find out exactly what this is or how to calculate it. I couldn't find anything in IEEE 1584 either.



Thoughts?

 

[Sahib]

During closed transition, it is usually assumed no fault exceeding protective device capacity would occur!

 

[Russs57]

During closed transition you do have both sources in parallel reducing source impedance and increasing arc fault current. However that only happens with both sources available, and even then, should be limited to a 100 millisecond interval. I’m thinking this would be a non issue for AHJ but I’m not an EE.

Nice feature for those that don’t want any interruptions when performing required testing but a non issue in a real outage.

 

[ron]

Depending on the software you are using, it is likely the calculated current at the bus versus the current at the protective device that clear the fault.

During closed transition, fault current goes up due to both sources contributing and the protective devices act faster since their inverse time characteristics will open faster when more current is introduced.

You absolutely need to consider the close transition case, whether it is 100ms or more, generally for higher SCCRs since for arc flash will often end up with lower incident energy. Still possible for a fault, considering it takes a breaker several milliseconds to respond.

 

[lielec11]

Thanks for all the responses.

@Sahib - please elaborate I'm not sure exactly what you're trying to say.

@ron - I understand the difference in the nomenclature, I'm just not sure how SKM is getting such a lower value for the device. I've attached an image of the system in question. The device that clears the fault is located upstream in 'MDP-BLDG 2' and the bus with high IE is 'ADP-BLDG 2'. I'm still not sure why all of the fault currents increase except for the protective device arcing fault. Bolted fault? Higher in closed transition... Arcing fault? Higher in closed transition... Protective device arcing fault? Lower..... Can't understand why this might be the case.

edit: not sure why the attachment is showing up so small :?

 

[Sahib]

Sorry,lielec11. I misunderstood your question. Here is my question for clarity. Have you considered an arc has resistance to be taken into account for protective device arcing fault and number of sources contributing to the fault?

 

[zed1995]

Hey leilec11, did you get a resolution to your question or not?
If not and you are still interested in exploring then maybe you could provide me with a clear picture of the model including the sources and the PD and bus in question highlighted?

 

[jim dungar]

This thread is being closed because it is two years since the previous posting.
Please feel free to start a new thread if you would like to continue the discussion.